I recently got a Lattice XP2 Brevia development board to play around with FPGAs. This isn't the latest version of development boards you can get from Lattice but it will suit the needs of a beginner. I didn't find any simple tutorials dedicated to absolute beginners so I decided to show you my first simple steps. At first you will need several gigabytes of software by Lattice to start. So begin by downloading and installing Lattice Diamond from the offical website (you will need a free account to do so). When you are done you need a license to start Diamond. You can request a free license which will be sent to you via mail. Follow the instructions in the mail you will get and start Lattice Diamond for the first time (I did'nt had to change the environment variables for my system - it worked after I placed the license file in the right directory).
The goal is to build a simple 2 bit adder using the LEDs and buttons on the development board. This may sound simple but getting there took me several hours of trial and error. So start of by creating a new project in the Diamond software. Skip the "Add Source" window by clicking "Next" and choose "Lattice XP2" with "LFXP-5E-6TN144C" in the device window.
When you are done click on "New File" and create a new schematic file. There is a toolbar on the left which contains all the tools we want to work with.
At first we have to place the simple logic devices we want to use. Fortunately there is 2 bit adder which is ready to use so we don't have to build it using exclusive-OR gates.
To add it to the circuit click on the "Add Symbol" button and choose the library "lattice.lib". Then choose the device "fadd2b" and place it anywhere on the worksheet. We also need 5 inverters ("inv") and one logic low generator ("vlo") which can also be found in the library.
Building the circuit
You should have 5 inverters, one logic low level and one 2 bit adder in you schematic. Now it's time to wire it up and put everything together. Select the wire tool from the left and add wires between the inverters and the gate inputs. Also add free wires in front of inverter. When you are done it should look like this (you can ignore the carry out line on the right):
Now the wiring looks fine and it's time to proceed by adding inputs and outputs. At first we have to add a name to every open wire we have. Click on the "Net Name" button, enter a wire name (which is easy to identify) and click on the wire you want to name. When you are done every wire shoud have a name.
Wires with names
Finally add IO Ports to every open wire using the "IO Port" tool. There should be inputs on the left side of the adder and outputs on the right side of the adder. The direction of the port can be selected in the drop down menu. You can click and hold your mouse and pull it over every open wire. When you release the mouse button the input/output symbols should appear.
Before we can assign our inputs and outputs to the pins of the FPGA we need to translate the design. To do so right click on the the menu point "Translate Design" and select "Run". You will see several output in the Output window and the process may take some time. In the end the output window should say "Done: completed successfully" and we are ready to proceed.
Click on the "Spreadsheet View" icon (on the far left of the top toolbar - see below) and select the "Pin Assignments" Tab. You will get an overview of all the pins your FPGA has. We will assign the output signals to the LEDs on the board. I have assigned signal S0 to pin 46 and signal S1 to pin 45. To do so just right click on the "signal name" cell of the pin you want to assign and select "Assign Signals". In the menu select the signal you want to assign from the list on the right and click "Assign Signals". I assigned the input signals to the push buttons of the development board (pins 50 - 54).
Signals and Pins
Like a HEX file to program a microcontroller we need a JEDEC file which contains our logic definitions. To create it we check "JEDEC File" in the "Process" menu. Then we left click on "JEDEC File" and select "Run".
Creating a JEDEC File
This will take a lot of time and when the output window says "Finish loading physical design information" you are done. Now it's time to upload the file to the FPGA using the "Programmer" tool of Diamond or the ISPvm tool by Lattice. It's a lot about wiring up the JTAG programer and installing a driver for it (don't try it with Windows 8 - it won't work :) so I will not explain it in detail. If you have questions please leave me a mail or write a comment :).
This has been a great help, as you say there isn't a simple tutorial for this development board! Have you been able to simulate the design using the waveform editor, testbench, Active-HDL etc? I am still trying get this all working!
No sorry I was just testing the basic design features :(
Thank you! It's realy easy to beginers :) It's exactly what I need :)
It was exactly what I need. Thanks
You really should start by learning VHDL programming, program the blocks than use scematics to easily connect them. If you get a good book you will also learn how to analyse simulation results. VHDL programming, everything about flipflops and the different codes is a first semester course at universities in Germany, it's really simple.
Thanks for your comment. This is supposed to be a simple tutorial how to setup software and the board, not programming anything.
Thank you for helping me get started. After going through this tutorial, I was able to get some Verilog code over to the Brevia2 to blink some lights. I had some trouble with "Translating the Design" step. That menu does not appear unless you choose Synplify Pro when first setting up the project.
Thanks for the help! For the Brevia board, which pin acts like a clock? What is the pad name/ dual function name associated with it?
Unfortunately the Lattice diamond IDE is almost unusable on Windows 10. The schematic editor is completely broken (cannot edit or delete objects, cannot assign pins to wires in spreadsheet view etc). Would be good to update this tutorial with this in mind.